The present invention relates to output drivers and, more particularly, to a programmable adaptive output driver for use in integrated circuits.
BACKGROUND INFORMATION
An integrated circuit (IC) is usually constructed from a small chip of semiconductor material upon which an array of active/passive components have been constructed and connected together to form a functioning circuit. An IC is generally encapsulated in a plastic housing (chip) with signal, power supply, and control pins accessible for connection to external electronic circuitry. Typically, input signals transmitted to an integrated circuit via selected input pins are processed by the array of active/passive components, and the processed signals are then applied to selected output pins using an output driver. The output driver xe2x80x9cpulls-upxe2x80x9d or xe2x80x9cpulls-downxe2x80x9d a voltage level of the output in response to the signals generated by the array of components, thereby providing logic xe2x80x9c1xe2x80x9d and xe2x80x9c0xe2x80x9d signals which are transmitted to the external circuitry connected to the output.
A typical output driver includes a CMOS inverter with a p-channel pull-up transistor and an n-channel pull-down transistor. The n-channel and p-channel transistors in the CMOS inverter are often designed to supply enough current to a large load while the output swings between the rails of the power supply at a relatively high frequency. Also, circuitry external to the IC is usually employed to couple output drivers to a load condition.
Output drivers can be used to drive a signal onto a bus line that has a relatively large load. Output drivers are often designed and simulated to meet specific application requirements such as load size, as well as speed and/or noise compensation. Typically, output drivers are designed to quickly drive signals under expected load conditions, but at the same time, not too quickly so as to cause excessive noise problems. Additionally, a particular application of an output driver may be limited to a maximum slew rate so as to minimize undesirable high frequency components of the output signal and reduce unwanted radiation.
When the real world performance of an output driver for an IC did not satisfy specification requirements, complete redesign of the output driver was often necessary. Historically, the trip point of an output driver was not adjustable after the IC was manufactured and the driver could not be readily modified to compensate for a greater and/or different range of actual loading conditions. Since an IC with non-conforming output performance is usually unfit for its intended purpose, it will be appreciated that enabling the performance of an output driver to be tuned to meet specification requirements after the IC is reduced to silicon would reduce delays and costs associated with redesigning an output driver for an IC manufactured for a particular use.
In accordance with the invention, the strength of an output signal to drive a load can be adjusted after an adaptive output driver is manufactured. The adaptive output driver includes a primary driver and a secondary driver. The primary driver provides a primary current for driving the output signal into the load. A control circuit enables the secondary driver to assist the primary driver by providing an additional current that is added to the primary current to drive the output signal into the load when transition times between high and low states for the output signal are slower than a maximum slew rate. A buffer for disabling the operation of the secondary driver, wherein a trip point for the buffer to disable the secondary driver is programmable so that the total amount of current provided by the output driver to drive the output signal into the load is adaptable to different loading conditions.
In accordance with other aspects of the invention, the buffer includes at least one cell of at least two pull-up transistors and at least two pull-down transistors. Hysteresis in the response of the buffer is related to an imbalance in the sizing ratio of each pull-up transistor and each pull-down transistor in each enabled cell. Also, the hysteresis defines the value for the trip point where the buffer disables the operation of the secondary driver.
In accordance with still other aspects of the invention, a logic circuit is coupled to the buffer and provides for selectively enabling one or more cells so that a position for the buffer""s trip point is adjustable for different loading conditions. The pull-up transistors and pull-down transistors can be CMOS transistors. Also, the buffer may be a Schmitt-trigger buffer.
In accordance with yet other aspects of the invention, the control circuit employs a single transistor to negate a logical state for each logic gate included in the control circuit so that the response time for the control circuit is reduced. The control circuit can also provide short circuit protection and employ feedback to monitor the slew rate of the transitions between the high and low states of the output signal. Also, the trip point of the buffer includes a low trip point for transitions from the high state to the low state of the output signal and a high trip point for transitions from the low state to the high state of the output signal.
In accordance with one embodiment of the invention, programmable Schmitt-trigger buffers provide separate delays in output stages of a distributed and weighted output driver. Each output stage includes an inverter that can be separately controlled by the output of a corresponding Schmitt-trigger buffer. A logic circuit enables the programming of a separate time delay for the activation of each buffer so that the amount of current to drive the output signal into a load is ramped up over time.
In accordance with another embodiment of the invention, a programmable Schmitt-trigger buffer is employed in an input stage of an input/output driver to delay when an input signal is provided to a integrated circuit. The input/output driver includes a tri-state buffer for the driver""s output stage to drive an output signal into an output load. A logic circuit enables the operation of the Schmitt-trigger buffer to be adjusted for different input signal conditions.
The invention may also be implemented as methods that perform substantially the same functionality as the embodiments of the invention discussed above and below.
These and other features as well as advantages, which characterize the invention, will be apparent from a reading of the following detailed description and a review of the associated drawings.